Abstract—In recent years, accelerating convolutional neural networks on Field Programmable Gate Array (FPGA) to improve the performance of the inference phase of artificial intelligent edge computing applications is a promising approach. This paper presents our proposed architecture for building a convolution neural network acceleration core on FPGA. The proposed FPGA-based core targets edge computing platforms where hardware resources and power efficiency are essential requirements. We use the MobileNet neural network model for image classification as a case study to evaluate our proposed system. We compare our work with a quad-core ARM Cortex processor at 1.2GHz and achieve speed-ups by up to 14.77× convolution operators. Although our system is worse than a 6-core Intel Core i7 processor, it is more energy-efficiency than the Intel processor. Our proposed system is the best fit for edge computing.
 
Keywords—Field Programmable Gate Array (FPGA), convolutional neural network, hardware accelerator, MobileNet


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